Otomatisasi Pembuatan Logic Design Dan Layout Pada Desain Vlsi ( Very Large Scale Integration )

Abstract

In making of design VLSI ( Very Large Scale Integrated Scale Integration ) is needed planning of Logic Design and Layout. The function of making of Logic Design is to translate existing case study into truth tables and then it is described into logical gates. In order to make Logic Design easier, it is required a software, the name is DSCH2. It can simulate result of truth tables, beside that it has ability to make verilog file ( one of  high language program HDL ).Layout represents form of pattern to be used in making IC ( Integrated Circuit ), where form of pattern to be made have to proper by Logic Design which have been made. In making of layout used a software, the name is MICROWIND2. This software is able to read verilog file that produced by DSCH2. In this research, we build logic design and layout for basic logical gates, such as NOT, AND and SOP ( Sum of Product ). They were made from MOS and CMOS materials.