Hardware Implementation and Analysis of Sinusoidal PWM-Based Three-Level Cascaded H-Bridge Inverter
DOI:
https://doi.org/10.18196/jrc.v6i3.26105Keywords:
Multilevel Inverter, Cascaded H-Bridge, Sinusoidal PWM, Total Harmonic Distortion, IGBT Driver CircuitAbstract
Multilevel Inverter (MLI) technology is essential in medium-voltage and high-power applications as it is capable of generating high-quality AC output from multiple DC voltage sources. Among the various topologies, the Cascaded H-Bridge (CHB) MLI is preferred owing to its modularity. The conventional Neutral Point Clamped (NPC) and Flying Capacitor (FC) MLIs suffer from uneven voltage distribution, requirement of clamping diodes, and complex circuitry. To address these drawbacks, a Three-Level Sinusoidal Pulse Width Modulation (TL-SPWM)-based CHB-MLI is proposed with an inexpensive Insulated Gate Bipolar Transistor (IGBT) driver circuit and a Schmitt trigger-based dead-time circuit that introduces a one-microsecond delay at a 2 kHz switching frequency. Simulation and hardware verification confirm that the proposed system achieves significant performance improvement, reducing Total Harmonic Distortion (THD) from 48% to 31% as the modulation index is increased from 0.6 to 0.9. Experimental results show a similar reduction from 53% to 35%, with weighted THD reduced to 1.3%. These improvements confirm the effectiveness of the TL-SPWM technique in producing improved output waveform quality. The proposed inverter is well suited for renewable energy system applications, electric vehicle drives, and industrial motor drives. In addition to overcoming limitations of conventional MLI designs, this work also contributes to the further evolution of efficient and cost-effective MLI technology for real-world power electronics applications.
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